基于CPLD的QPSK调制器实现——电路设计

论文编号:TX377  论文字数:11621,页数:33

摘要

 在现代数字通信系统中，FPGA的应用相当广泛。尤其是在对基带信号的处理和整个系统的控制中。FPGA不但能大大缩短电路的体积，提高电路的稳定性，而且先进的开发工具使整个系统的设计调试周期大大缩短。为了使数字信号在带通信道中传输，必须用数字信号对载波进行调制。根据所处理的基带信号的进制不同分为二进制和多进制调制(M进制)。多进制数字调制与二进制相比，其频谱利用率更高，在有限的信道频带内，能够传输高速数据。数字通信技术与FPGA的结合是现代通信系统发展的一个必然趋势。本文介绍了一种基于CPLD实现QPSK调制系统的方法，包括基带信号产生电路，QPSK调制电路，D/A转换电路，重建滤波器组成。文中介绍了硬件设计思路，原理图在Protel中的绘制以及系统调试与测试等内容。
 
关键词：FPGA, QPSK, CPLD

ABSTRACT

 The FPGA is widespread used in modern digital communication system. Especially the dealing with baseband signal and the total system control. The FPGA can not only reduce the length of circuit great, but also improve the stability of circuit, and the advanced development tool reduces the test period of overall system. In order to make the digital signal transmit in band-pass channel, it must to debug the carrier wave with digital signal. According to the differences of baseband signal number systems, it is divided into binary modulation or multi-system modulation (M number systems). Comparing with binary modulation, utilization rate of frequency spectrum of MPSK is higher which can transmit high speed data in limited band-pass channel. The combination of digital communication technology and FPGA is the inexorable trend of the development of modern digital communication system. This article describes the realization of a CPLD-based QPSK modulation system, including baseband signal generator circuit, QPSK modulation circuit, D/A converter circuits, the composition of the reconstruction filter. This paper introduces the hardware design, schematic drawing of the Protel system debugging and testing, and so on.
 
Keywords: FPGA, QPSK, CPLD

目录
摘要 I
ABSTRACT II
第1章 绪论 1
 1.1 课题背景 1
 1.2 论文内容 1
 1.3 课题来源和意义 2
 1.4 EDA和CPLD发展概况 2
 1.5 调制与解调的基本原理简介 4
 1.6 本次毕业设计的主要工作 5
第2章 系统总体设计 6
 2.1 系统总体框图 6
 2.2 QPSK调制和解调的基本原理 6
 2.2.1 调制原理 6
 2.2.2 解调原理 7
 2.2.3 本设计解调原理 7
第3章 电路设计与分析 9
 3.1电源电路 9
 3.2时钟电路 11
 3.3 数字基带信号产生电路 12
 3.4 QPSK调制电路 13
 3.4.1 芯片介绍 13
 3.4.2 调制模块电路图与功能 18
 3.5 D/A模块 18
 3.5.1 DAC0832简介 19
 3.5.2 D/A模块电路图 20
 3.6滤波电路 21
第4章 电路调试测试 24
 4.1 CLK信号和基带信号测试 24
 4.2 调制模块测试 25
第5章 总结 27
致谢 28
参考文献 29