Abstract：This design is main the signal of the machine creation, saving, was connected by PCI send into the host, The components and jack of PCI is independence with processor, so it can sustain some processors, even the processor in the future. PCI bus with the independence can optimize the function of I/O most, and make system of processor/memory and all kinds of high performance exterior equipments execute the operations of the PCI Local Bus. The total line in PCI is the total line standard of a kind of plug-and-play, supporting to install automatically completely, biggest allow 64 proceeds together the data delivers, adopting the total line in address/ data reply to use the way, the tallest total line clock can amount to 66 MHz, support many total lines construction is abrupt to deliver with the line, the high peak value delivers speed can amount to 128 MB/ s.
