摘 要
VHDL(Very High Speed Integrated Circuit Hardware Description Language,超高速集成电路硬件描述语言)诞生于1982年,是由美国国防部开发的一种快速设计电路的工具,目前已经成为IEEE(The Institute of Electrical and Electronics Engineers)的一种工业标准硬件描述语言。相比传统的电路系统的设计方法,VHDL具有多层次描述系统硬件功能的能力,支持自顶向下(Top to Down)和基于库(LibraryBased)的设计的特点。
本数字频率计是一种以VHDL(硬件描述性语言)为基础采用自顶而下设计方法实现的。该设计要能测量方波信号频率的频率计,测量结果用4位十进制数表示,频率测量范围分为四档,并用数码显示管显示其频率;同时设置了一个量程状态显示信号,在超出最大量程时报警。
关键字:VHDL语言,数字频率计, EDA技术,QUARTUSⅡ
Abstract
VHDL (Very High Speed Integrated Circuit Hardware Description Language, high-speed integrated circuit HDL) was born in 1982, is from the U.S. Department of Defense developed a fast circuit design tools, has now become the IEEE (The Institute of Electrical and Electronics Engineers) an industry-standard hardware description language. Compared to the traditional system of circuit design, VHDL description of a multi-level system hardware features the ability to support top-down (Top to Down) and based on the (LibraryBased) the design characteristics.
This is a digital frequency of the VHDL (hardware description language) based on a top-down design methods to realize. The design must be able to measure the frequency square-wave frequency of measurement results with four decimal number, frequency range is divided into Sidang and digital display shows the frequency at the same time set up a status display signal range in excess of the largest Alarm at the range.
Keywords: VHDL language,Digital frequency meter, EDA technology, QUARTUSⅡ