基于ADF4110/ADF4111/ADF4112/ADF4113上的应用电路设计

字数:9200,页数:30

摘要
简要介绍频率合成器ADF4110/ADF4111/ADF4112/ADF4113的功能、内部结构、引脚排列及典型的应用电路。他由一个低噪声的数字相位/频率检波器PFD ，一个精密的充电泵，一个可编程的参基准分频器, 可编程的A、B计数器 , 和一个双模式的前置分频器 (P/P+1).A（6位）和B（13位）计数器连同双模式的前置分频器 (P/P+1)，能实现一个分频比为N的分频器。除此之外,14位的基准计数器（R计数器）允许在PFD的输入端选择REFIN的频率输入
关键字：低噪声数字相位/ 频率检波器PFD    精密充电泵    基准分频器   双模式前置分频器 (P/P+1)   基准计数器

Abstract
It briefly introduced the ADF4110/ADF4111/ADF4112/ADF4113 function, internal structure, pin array and typical apply circuit.They consist of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO).

Key word: low noise digital PFD       a precision charge pump     
 a programmable reference divider     the dual-modulus prescaler (P/P + 1)         reference counter

目 录

1. ADF4110/ADF4111/ADF4112/ADF4113芯片简介 .........................................4

2. ADF4110/ADF4111/ADF4112/ADF4113芯片封装与引脚功能 ...............................4

3. ADF4110/ADF4111/ADF4112/ADF4113内部结构与工作原理................................10
3．1  基准信号输入电路..............................................................10
3．2  射频输入电路   ...............................................................11
3．3  前置分频器   .................................................................11
3．4  A和B计数器  ..................................................................11
3．5  R计数器   ....................................................................12
3．6  相位频率检波器和充电泵 .......................................................12
3．7  多路复用器输出和锁定检测 .....................................................14
3．8  输入移位寄存器  ..............................................................16
3．9  功能锁存器 ...................................................................18
3．10 初始化锁存器 .................................................................21
3．11 起始高功耗后的设备编程  ......................................................22
3．12 同步化预分频器输出 ...........................................................23

4. ADF4110/ADF4111/ADF4112/ADF4113应用电路设计 .....................................23
4．1  GSM基站发射器的本地振荡器 ....................................................23
4．2  用一个D/A转换器去驱动RSET引脚 ................................................24
4．3  关门电路  ....................................................................24
4．4  含多种频率的 PLL .............................................................25
4．5  直接变换调节器 ...............................................................26
4．6  接口连接  ....................................................................27
4．7  芯片封装的PCB设计指导方针  ...................................................28
  4. 8   外形尺寸    ...............................................................28

5. 总结  ...........................................................................29

参考文献 ...........................................................................30