数字频率信号源设计

; MOV R1,#08H SOUT0: MOV A,R2 CLR SCL RLC A MOV SDA,C SETB SCL DJNZ R1,SOUT0 MOV R1,#08H SOUT1: MOV A,R2 CLR SCL RLC A MOV SDA,C SETB SCL DJNZ R1,SOUT1 MOV R1,#08H SOUT2: MOV A,R2 CLR SCL RLC A MOV SDA,C SETB SCL DJNZ R1,SOUT2 MOV R1,#08H SOUT3: MOV A,R2 CLR SCL RLC A MOV SDA,C SETB SCL DJNZ R1,SOUT3 CLR LOAD SETB LOAD NOP NOP CLR LOAD AJMP RE PROCE5: CPL 01H AJMP RE PROC6: MOV R0,#0FFH PROCE6: INC R0 MOV A,R0 ADD A,#0EDH ;数值还不确定 JC PROC6 AJMP CHANGE PROC7: MOV R0,#013H ;数值还不确定 PROCE7: DEC R0 MOV A,R0 ADD A,#0EDH JC PROC7 CHANGE: MOV 26H,R0 JNB 01H,CHANGE1 MOV A,R0 ADD A,#013H ;数值还不确定 MOV 26H,A CHANGE1:MOV DPTR,#TABLE0 MOV A,26H MOV B,#04H MUL AB ADD A,DPL MOV DPL,A MOV A,B ADDC A,DPH MOV DPH,A MOV A,#00H MOVC A,@A+DPTR MOV R2,A MOV A,#01H MOVC A,@A+DPTR MOV R3,A MOV A,#02H MOVC A,@A+DPTR MOV R4,A MOV A,#03H MOVC A,@A+DPTR MOV R5,A MOV DPTR,#TABLE1 MOV A,26H MOV B,#02H MUL AB ADD A,DPL MOV DPL,A MOV A,B ADDC A,DPH MOV DPH,A MOV A,#00H MOVC A,@A+DPTR MOV R6,A MOV A,#01H MOVC A,@A+DPTR MOV R7,A POP DPH POP DPL POP ACC RET DISP: PUSH ACC PUSH DPH PUSH DPL MOV DPTR,#TABLE CLR P0.7 MOV A,R6 SWAP A ANL A,#0FH MOVC A,@A+DPTR MOV P2,A SETB P0.4 ACALL DELAY0 CLR P0.4 MOV A,R6 ANL A,#0FH MOVC A,@A+DPTR MOV P2,A CLR P2.4 ;不一定啊 SETB P0.5 ACALL DELAY0 CLR P0.5 MOV A,R7 SWAP A ANL A,#0FH MOVC A,@A+DPTR MOV P2,A SETB P0.6 ACALL DELAY0 CLR P0.6 MOV A,R7 ANL A,#0FH MOVC A,@A+DPTR MOV P2,A SETB P0.7 JNB 00H,DE2 CLR P2.4 DE2: ACALL DELAY0 POP DPL POP DPH POP ACC RET DELAY0: MOV 23H,#0FFH DJNZ 23H,$ RET TABLE: DB 0010001B,11011101B,00111000B,10011000B,11010100B;0.1.2.3.4 DB 10010010B,00010010B,11011001B,00010000B,10010000B;5.6.7.8.9 TABLE0: DB 000H,000H,045H,0C9H,000H,030H,08BH,091H DB 000H,048H,0D1H,05AH,000H,061H,017H,023H DB 000H,079H,05CH,0EBH,000H,091H,0A3H,0B4H DB 000H,0A9H,0E8H,07CH,000H,0C2H,02EH,045H DB 000H,0DAH,074H,00EH,000H,0F2H,0B9H,0D6H DB 001H,0E5H,073H,0ADH,002H,0D8H,02DH,083H DB 003H,0CAH,0E7H,059H,004H,0BDH,0A1H,02FH DB 005H,0B0H,05BH,006H,006H,0A3H,014H,0DCH

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数字频率信号源设计(十五)